1. Technical Field
Embodiments described herein generally relate to non-volatile semiconductor memory circuits and, more particularly, to a non-volatile semiconductor memory circuit with an improved read and write margin.
2. Related Art
Recently, a phase change random access memory (hereinafter, referred to as “PRAM”), as a non-volatile memory, has gained attention. The PRAMs are researched and developed for application to various semiconductor systems and devices since they are a type of non-volatile memories but nonetheless randomly accessible.
A unit cell of a PRAM consists of one access device connected to a word line and one variable resistor (GST: germanium, antimony, and tellurium) connected to a bit line. The variable resistor (GST) is made of a reversible phase change material, especially GST (Ge2Sb2Te5) alloy, which is in the form of a thin film. The variable resistor (GST) has high resistance in an amorphous state and low resistance in a crystalline state. As such, one can store data in a PRAM cell by setting it to one of the two physical states using the resistance difference of the variable resistor (GST).
In case of a single level cell of the PRAM, two states of the data can be distinguished based on a sensing voltage, i.e., a reference voltage in a read operation. That is, if the data is readable at the reference voltage, it is called “reset state” (‘1’). However, if the data is not readable at the reference voltage, it is called “set state” (‘0’). In view of the resistance, when the resistance of the variable resistor (GST) is high, the data is ‘1’, and when the resistance of the variable resistor (GST) is low, the data is ‘0’.
A reversible phase change in the variable resistor (GST) of this PRAM is accomplished by Jule-heating caused by electrical pulses applied by external circuits. The process to control the phase of the variable resistor (GST) is called “set/reset” process which is controlled by the electrical pulses, as described above.
As described above, when the state of the data is controlled by heat which is caused in the variable resistor (GST) by pulses, the change in temperature causes a change in the resistance of the variable resistor (GST). Therefore, the resistance of each of the memory cells spread over a wide range such that a read margin distinguishing the crystalline state and the amorphous state is reduced. As a result, the reliability of the PRAM may deteriorate.